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RISC-V architecture related content
RISC-V architecture support project <riscv@gentoo.org>
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path:
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profiles
Commit message (
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Author
Age
Files
Lines
*
profiles: write -mabi= explicitly in cflags
Andreas K. Hüttel
2019-04-21
2
-0
/
+10
*
profiles: Make sure we get python patched for riscv
Andreas K. Hüttel
2019-04-21
1
-0
/
+2
*
profiles: No Python 2 here, since it has lots of trouble with two-stage libdir
Andreas K. Hüttel
2019-04-20
1
-0
/
+2
*
profiles: No Python 2 here, since it has lots of trouble with two-stage libdir
Andreas K. Hüttel
2019-04-20
1
-0
/
+3
*
profiles: Globally mask useflag seccomp; library does not work yet on riscv
Andreas K. Hüttel
2019-04-20
1
-0
/
+2
*
profiles: mask libpcre jit flag, not supported yet
Andreas K. Hüttel
2019-04-20
1
-0
/
+4
*
profiles: Also accept amd64 keywords for now
Andreas K. Hüttel
2019-04-20
1
-1
/
+1
*
profiles: Disable advanced portage features to make qemu work
Andreas K. Hüttel
2019-04-20
1
-0
/
+3
*
profiles: Add profiles.desc
Andreas K. Hüttel
2019-04-18
1
-0
/
+5
*
profiles: Add first attempt at riscv profiles
Andreas K. Hüttel
2019-04-18
22
-0
/
+107
*
Initialize empty overlay
Andreas K. Hüttel
2019-04-18
2
-0
/
+2