diff options
-rw-r--r-- | sys-devel/gcc-hppa64/ChangeLog | 7 | ||||
-rw-r--r-- | sys-devel/gcc-hppa64/Manifest | 5 | ||||
-rw-r--r-- | sys-devel/gcc-hppa64/files/digest-gcc-hppa64-3.3.2-r1 | 1 | ||||
-rw-r--r-- | sys-devel/gcc-hppa64/files/gcc-3.3.2-rtl-optimization.patch | 163 | ||||
-rw-r--r-- | sys-devel/gcc-hppa64/gcc-hppa64-3.3.2-r1.ebuild | 109 |
5 files changed, 283 insertions, 2 deletions
diff --git a/sys-devel/gcc-hppa64/ChangeLog b/sys-devel/gcc-hppa64/ChangeLog index 8708c39fee13..afe144526a6d 100644 --- a/sys-devel/gcc-hppa64/ChangeLog +++ b/sys-devel/gcc-hppa64/ChangeLog @@ -1,6 +1,11 @@ # ChangeLog for sys-devel/gcc-hppa64 # Copyright 2000-2004 Gentoo Technologies, Inc.; Distributed under the GPL v2 -# $Header: /var/cvsroot/gentoo-x86/sys-devel/gcc-hppa64/ChangeLog,v 1.5 2004/06/22 13:13:16 gmsoft Exp $ +# $Header: /var/cvsroot/gentoo-x86/sys-devel/gcc-hppa64/ChangeLog,v 1.6 2004/06/23 15:34:57 gmsoft Exp $ + +*gcc-hppa64-3.3.2-r1 (23 Jun 2004) + + 23 Jun 2004; Guy Martin <gmsoft@gentoo.org> gcc-hppa64-3.3.2-r1.ebuild: + Fixed rtl-optimization for gcc 3.3.2 as well. *gcc-hppa64-3.4.0 (22 Jun 2004) diff --git a/sys-devel/gcc-hppa64/Manifest b/sys-devel/gcc-hppa64/Manifest index 7ff048f36740..d6a7c55c6688 100644 --- a/sys-devel/gcc-hppa64/Manifest +++ b/sys-devel/gcc-hppa64/Manifest @@ -1,9 +1,12 @@ MD5 95bf5528c65f06058a60deb21f822928 gcc-hppa64-3.3.2.ebuild 2280 MD5 016028badcf024e3ef4688435ffbce58 metadata.xml 223 MD5 292ec8277cb83fa807b08fb54cd1780e gcc-hppa64-3.4.0.ebuild 2368 -MD5 9f63afabccd53cd708b7c0c5cb9cc216 ChangeLog 951 +MD5 91ea1337320896e3bee3ebdd39208557 ChangeLog 1110 +MD5 27e8e4584dfc90676d2d29685c1c2aae gcc-hppa64-3.3.2-r1.ebuild 2336 MD5 006481ae255582fae4fa22107dfb359e files/digest-gcc-hppa64-3.3.2 64 MD5 d9ae122db2768f8e504dfef256d4991f files/gcc-3.3.2-gentoo-branding.patch 874 MD5 c18300f698a8fd5c824c1ddb4d0685dd files/digest-gcc-hppa64-3.4.0 64 MD5 23e11b0b1e3621760d3e4d831d000161 files/gcc-3.4.0-gentoo-branding.patch 843 MD5 b859dad4b64217f98ba18423c059e30f files/gcc-3.4.0-rtl-optimization.patch 5681 +MD5 006481ae255582fae4fa22107dfb359e files/digest-gcc-hppa64-3.3.2-r1 64 +MD5 dcdd2cf7d57f6edf2fbe8c2063f76376 files/gcc-3.3.2-rtl-optimization.patch 6624 diff --git a/sys-devel/gcc-hppa64/files/digest-gcc-hppa64-3.3.2-r1 b/sys-devel/gcc-hppa64/files/digest-gcc-hppa64-3.3.2-r1 new file mode 100644 index 000000000000..77fbcb74b416 --- /dev/null +++ b/sys-devel/gcc-hppa64/files/digest-gcc-hppa64-3.3.2-r1 @@ -0,0 +1 @@ +MD5 65999f654102f5438ac8562d13a6eced gcc-3.3.2.tar.bz2 23585904 diff --git a/sys-devel/gcc-hppa64/files/gcc-3.3.2-rtl-optimization.patch b/sys-devel/gcc-hppa64/files/gcc-3.3.2-rtl-optimization.patch new file mode 100644 index 000000000000..dcb5c713b00e --- /dev/null +++ b/sys-devel/gcc-hppa64/files/gcc-3.3.2-rtl-optimization.patch @@ -0,0 +1,163 @@ +Index: config/pa/pa.c +=================================================================== +RCS file: /cvs/gcc/gcc/gcc/config/pa/pa.c,v +retrieving revision 1.188.2.12 +diff -u -3 -p -r1.188.2.12 pa.c +--- gcc/config/pa/pa.c 26 Sep 2003 20:22:16 -0000 1.188.2.12 ++++ gcc/config/pa/pa.c 21 Jun 2004 13:05:50 -0000 +@@ -1401,14 +1401,17 @@ emit_move_sequence (operands, mode, scra + operand1 = gen_rtx_MEM (GET_MODE (operand1), tem); + + /* Handle secondary reloads for loads/stores of FP registers from +- REG+D addresses where D does not fit in 5 bits, including ++ REG+D addresses where D does not fit in 5 or 14 bits, including + (subreg (mem (addr))) cases. */ + if (fp_reg_operand (operand0, mode) + && ((GET_CODE (operand1) == MEM +- && ! memory_address_p (DFmode, XEXP (operand1, 0))) ++ && !memory_address_p ((GET_MODE_SIZE (mode) == 4 ? SFmode : DFmode), ++ XEXP (operand1, 0))) + || ((GET_CODE (operand1) == SUBREG + && GET_CODE (XEXP (operand1, 0)) == MEM +- && !memory_address_p (DFmode, XEXP (XEXP (operand1, 0), 0))))) ++ && !memory_address_p ((GET_MODE_SIZE (mode) == 4 ++ ? SFmode : DFmode), ++ XEXP (XEXP (operand1, 0), 0))))) + && scratch_reg) + { + if (GET_CODE (operand1) == SUBREG) +@@ -1437,10 +1440,14 @@ emit_move_sequence (operands, mode, scra + } + else if (fp_reg_operand (operand1, mode) + && ((GET_CODE (operand0) == MEM +- && ! memory_address_p (DFmode, XEXP (operand0, 0))) ++ && !memory_address_p ((GET_MODE_SIZE (mode) == 4 ++ ? SFmode : DFmode), ++ XEXP (operand0, 0))) + || ((GET_CODE (operand0) == SUBREG) + && GET_CODE (XEXP (operand0, 0)) == MEM +- && !memory_address_p (DFmode, XEXP (XEXP (operand0, 0), 0)))) ++ && !memory_address_p ((GET_MODE_SIZE (mode) == 4 ++ ? SFmode : DFmode), ++ XEXP (XEXP (operand0, 0), 0)))) + && scratch_reg) + { + if (GET_CODE (operand0) == SUBREG) +Index: config/pa/pa.h +=================================================================== +RCS file: /cvs/gcc/gcc/gcc/config/pa/pa.h,v +retrieving revision 1.178.2.6 +diff -u -3 -p -r1.178.2.6 pa.h +--- gcc/config/pa/pa.h 28 Feb 2004 23:44:40 -0000 1.178.2.6 ++++ gcc/config/pa/pa.h 21 Jun 2004 13:05:50 -0000 +@@ -1264,7 +1264,7 @@ extern int may_call_alloca; + + `S' is the constant 31. + +- `T' is for fp loads and stores. */ ++ `T' is for floating-point loads and stores. */ + #define EXTRA_CONSTRAINT(OP, C) \ + ((C) == 'Q' ? \ + (IS_RELOADING_PSEUDO_P (OP) \ +@@ -1283,22 +1283,24 @@ extern int may_call_alloca; + && (move_operand (OP, GET_MODE (OP)) \ + || memory_address_p (GET_MODE (OP), XEXP (OP, 0))\ + || reload_in_progress)) \ +- : ((C) == 'T' ? \ +- (GET_CODE (OP) == MEM \ +- /* Using DFmode forces only short displacements \ +- to be recognized as valid in reg+d addresses. \ +- However, this is not necessary for PA2.0 since\ +- it has long FP loads/stores. \ +- \ +- FIXME: the ELF32 linker clobbers the LSB of \ +- the FP register number in {fldw,fstw} insns. \ +- Thus, we only allow long FP loads/stores on \ +- TARGET_64BIT. */ \ +- && memory_address_p ((TARGET_PA_20 \ +- && !TARGET_ELF32 \ +- ? GET_MODE (OP) \ +- : DFmode), \ +- XEXP (OP, 0)) \ ++ : ((C) == 'T' ? \ ++ (GET_CODE (OP) == MEM \ ++ /* Floating-point loads and stores are used to load \ ++ integer values as well as floating-point values. \ ++ They don't have the same set of REG+D address modes \ ++ as integer loads and stores. PA 1.x supports only \ ++ short displacements. PA 2.0 supports long displacements \ ++ but the base register needs to be aligned. \ ++ \ ++ The checks in GO_IF_LEGITIMATE_ADDRESS for SFmode and \ ++ DFmode test the validity of an address for use in a \ ++ floating point load or store. So, we use SFmode/DFmode \ ++ to see if the address is valid for a floating-point \ ++ load/store operation. */ \ ++ && memory_address_p ((GET_MODE_SIZE (GET_MODE (OP)) == 4 \ ++ ? SFmode \ ++ : DFmode), \ ++ XEXP (OP, 0)) \ + && !(GET_CODE (XEXP (OP, 0)) == LO_SUM \ + && GET_CODE (XEXP (XEXP (OP, 0), 0)) == REG \ + && REG_OK_FOR_BASE_P (XEXP (XEXP (OP, 0), 0))\ +@@ -1398,17 +1400,36 @@ extern int may_call_alloca; + && REG_OK_FOR_BASE_P (XEXP (X, 1))) \ + base = XEXP (X, 1), index = XEXP (X, 0); \ + if (base != 0) \ +- if (GET_CODE (index) == CONST_INT \ +- && ((INT_14_BITS (index) \ +- && (TARGET_SOFT_FLOAT \ +- || (TARGET_PA_20 \ +- && ((MODE == SFmode \ +- && (INTVAL (index) % 4) == 0)\ +- || (MODE == DFmode \ +- && (INTVAL (index) % 8) == 0)))\ +- || ((MODE) != SFmode && (MODE) != DFmode))) \ +- || INT_5_BITS (index))) \ +- goto ADDR; \ ++ if (GET_CODE (index) == CONST_INT \ ++ && ((INT_14_BITS (index) \ ++ && (((MODE) != DImode \ ++ && (MODE) != SFmode \ ++ && (MODE) != DFmode) \ ++ /* The base register for DImode loads and stores \ ++ with long displacements must be aligned because \ ++ the lower three bits in the displacement are \ ++ assumed to be zero. */ \ ++ || ((MODE) == DImode \ ++ && (!TARGET_64BIT \ ++ || (INTVAL (index) % 8) == 0)) \ ++ /* Similarly, the base register for SFmode/DFmode \ ++ loads and stores with long displacements must \ ++ be aligned. \ ++ \ ++ FIXME: the ELF32 linker clobbers the LSB of \ ++ the FP register number in PA 2.0 floating-point \ ++ insns with long displacements. This is because \ ++ R_PARISC_DPREL14WR and other relocations like \ ++ it are not supported. For now, we reject long \ ++ displacements on this target. */ \ ++ || (((MODE) == SFmode || (MODE) == DFmode) \ ++ && (TARGET_SOFT_FLOAT \ ++ || (TARGET_PA_20 \ ++ && !TARGET_ELF32 \ ++ && (INTVAL (index) \ ++ % GET_MODE_SIZE (MODE)) == 0))))) \ ++ || INT_5_BITS (index))) \ ++ goto ADDR; \ + if (! TARGET_SOFT_FLOAT \ + && ! TARGET_DISABLE_INDEXING \ + && base \ +@@ -1511,6 +1532,11 @@ do { \ + else \ + newoffset = offset & ~mask; \ + \ ++ /* Ensure that long displacements are aligned. */ \ ++ if (!VAL_5_BITS_P (newoffset) \ ++ && GET_MODE_CLASS (MODE) == MODE_FLOAT) \ ++ newoffset &= ~(GET_MODE_SIZE (MODE) -1); \ ++ \ + if (newoffset != 0 \ + && VAL_14_BITS_P (newoffset)) \ + { \ + diff --git a/sys-devel/gcc-hppa64/gcc-hppa64-3.3.2-r1.ebuild b/sys-devel/gcc-hppa64/gcc-hppa64-3.3.2-r1.ebuild new file mode 100644 index 000000000000..a6215ae0a111 --- /dev/null +++ b/sys-devel/gcc-hppa64/gcc-hppa64-3.3.2-r1.ebuild @@ -0,0 +1,109 @@ +# Copyright 1999-2004 Gentoo Technologies, Inc. +# Distributed under the terms of the GNU General Public License v2 +# $Header: /var/cvsroot/gentoo-x86/sys-devel/gcc-hppa64/gcc-hppa64-3.3.2-r1.ebuild,v 1.1 2004/06/23 15:34:57 gmsoft Exp $ + +inherit eutils + + +# Variables +MYARCH="$(echo ${PN} | cut -d- -f2)" +TMP_P="${P/-${MYARCH}/}" +TMP_PN="${PN/-${MYARCH}/}" +I="/usr" +S="${WORKDIR}/${P}" + + +DESCRIPTION="Gcc for 64bit hppa kernels" +HOMEPAGE="http://www.gnu.org/software/gcc/gcc.html" +SRC_URI="ftp://gcc.gnu.org/pub/gcc/releases/${TMP_P}/${TMP_P}.tar.bz2" +LICENSE="GPL-2 LGPL-2.1" +SLOT="0" + +KEYWORDS="-* hppa" + +DEPEND="virtual/glibc + >=sys-devel/binutils-hppa64-2.14.90.0.7 + >=sys-devel/binutils-2.14.90.0.7 + >=sys-devel/gcc-config-1.3.1" + +RDEPEND="virtual/glibc + >=sys-devel/gcc-config-1.3.1 + >=sys-libs/zlib-1.1.4 + >=sys-apps/texinfo-4.2-r4 + !build? ( >=sys-libs/ncurses-5.2-r2 )" + +TARGET=hppa64-linux + +version_patch() { + [ ! -f "$1" ] && return 1 + [ -z "$2" ] && return 1 + + sed -e "s:@GENTOO@:$2:g" ${1} > ${T}/${1##*/} + epatch ${T}/${1##*/} +} + +src_unpack() { + unpack ${TMP_P}.tar.bz2 + cd ${WORKDIR} + ln -s ${TMP_P} ${P} + cd ${S} + + # Make gcc's version info specific to Gentoo + if [ -z "${PP_VER}" ]; then + version_patch ${FILESDIR}/${TMP_P}-gentoo-branding.patch \ + "(Gentoo Linux ${PVR})" || die "Failed Branding" + fi + + epatch ${FILESDIR}/${TMP_P}-rtl-optimization.patch +} + +src_compile() { + cd ${WORKDIR} + + # Build in a separate build tree + mkdir -p ${WORKDIR}/build + cd ${WORKDIR}/build + + einfo "Configuring GCC..." + + addwrite "/dev/zero" + ${S}/configure --prefix=${I} \ + --build=hppa-linux \ + --host=hppa-linux \ + --disable-shared \ + --without-libc \ + --enable-languages=c \ + --target=${TARGET} \ + ${myconf} || die + + einfo "Building GCC..." + S="${WORKDIR}/build" \ + emake CPATH=/usr/include CFLAGS="${CFLAGS}" || die +} + +src_install() { + # Do allow symlinks in ${I}/lib/gcc-lib/${CHOST}/${PV}/include as + # this can break the build. + for x in cd ${WORKDIR}/build/gcc/include/* + do + if [ -L ${x} ] + then + rm -f ${x} + fi + done + + einfo "Installing GCC..." + # Do the 'make install' from the build directory + cd ${WORKDIR}/build + S="${WORKDIR}/build" \ + make prefix=${D}${I} \ + FAKE_ROOT="${D}" \ + install || die + + #Remove unneeded files + + for i in lib/libiberty.a man share include info + do + rm -R ${D}/usr/${i} + done +} |